The MATCH Act Would Close the Last Semiconductor Export Control Loophole. ASML Has the Most to Lose.

7 min read
Stat 33% ASML’s China share of total 2025 revenue — the exposure the MATCH Act puts at risk.
Key takeaways
  • The MATCH Act, cleared by the House Foreign Affairs Committee on 22 April 2026, targets ASML DUV immersion tools by type for the first time — closing the gap that let SMIC produce 7nm chips without EUV.
  • The bill extends controls to post-sale servicing of ~1,400 ASML machines already inside Chinese fabs — a mechanism no prior BIS rulemaking has included.
  • The Netherlands has 150 days to demonstrate multilateral alignment; failure triggers automatic expansion of the Foreign Direct Product Rule to cover all foreign-made tools incorporating US-origin components.
  • BofA estimates a full DUV and servicing ban would cut ASML revenue by 14–15% and EBIT by 16–17%.
  • Procurement teams sourcing advanced-node components from SMIC should model a capacity plateau beginning in 2027.

Thirty-three percent. That is the share of ASML’s total 2025 revenue that came from China — a revenue base built heavily on deep ultraviolet (DUV) immersion lithography machines that US export controls, until now, have left untouched. On 2 April 2026, Congress introduced the Multilateral Alignment of Technology Controls on Hardware (MATCH) Act. On 22 April, the House Foreign Affairs Committee cleared it in what lawmakers called “the largest significant export control mark-up in the history of Congress.” If the bill becomes law in anything close to its current form, the DUV loophole closes — and with it, the last viable pathway for SMIC and Huawei to continue scaling near-frontier chip production.

For procurement and supply chain teams sourcing semiconductor components, the MATCH Act is not a distant legislative risk. It is a 150-day countdown with a named deadline, bipartisan Senate co-sponsorship including Democratic Leader Chuck Schumer, and structural mechanics that differ from every prior US semiconductor export control action.

What the MATCH Act Actually Does

Prior US semiconductor export controls have operated through two mechanisms under the Bureau of Industry and Security (BIS): the Entity List, which restricts named companies from receiving US-origin items, and the Foreign Direct Product Rule (FDPR), which extends US jurisdiction to foreign-made products incorporating US software or technology. Those tools blocked EUV lithography sales to China from 2019 and cut off Huawei’s access to TSMC in 2020. They left a gap: ASML’s DUV immersion tools — specifically the NXT:1980 series — were never restricted for Chinese fabs not on the Entity List.

The MATCH Act closes that gap with three distinct mechanisms that no prior BIS rulemaking has combined.

First, the bill targets equipment by type, not just by recipient. It mandates that Commerce designate DUV immersion lithography and cryogenic etch tools as “chokepoint” equipment and prohibit their sale to any facility operated by five named Chinese firms: SMIC, Hua Hong, Huawei, ChangXin Memory Technologies (CXMT), and Yangtze Memory Technologies Corp (YMTC), along with all subsidiaries and affiliates.

Second, it extends controls to servicing. Calibration, software updates, spare-parts supply, field support, and technical assistance are all covered. This is the provision that the financial press has underweighted. ASML’s Installed Base Management segment — which generated €2,488 million in Q1 2026 alone — is a recurring revenue stream tied to servicing roughly 1,400 machines already operating inside Chinese fabs. Under prior controls, those machines could keep running with ASML support. Under the MATCH Act’s servicing ban, they cannot.

Third, it locks the restrictions into statute rather than regulation. Current BIS controls are administrative rulemakings that any administration can tighten or reverse without congressional approval. The MATCH Act would require an act of Congress to modify, insulating the controls from the executive-branch discretion that has characterised semiconductor policy since 2022.

The allied-nation mechanism is the headline innovation. Commerce is given 150 days to negotiate equivalent controls with allied supplier nations — principally the Netherlands and Japan. If they demonstrate alignment, Commerce may defer unilateral action. If they cannot, the bill directs Commerce to expand the FDPR to cover any foreign-manufactured tool incorporating US-origin software, technology, or components at a near-zero de minimis threshold. That would bring ASML’s entire DUV product line under US export jurisdiction regardless of where it was manufactured or from which country it was shipped.

Why DUV Immersion Was the Gap

SMIC has achieved 7nm-class production without ever receiving an EUV lithography machine, using a technique called multi-patterning — stacking multiple DUV exposures to achieve the effective resolution of a more advanced node. SMIC’s N+3 process uses quadruple patterning on ASML NXT:1980Fi-series machines. Yield rates are low (reported at 20–40% for 7nm) and production costs are high, but the output is real: Huawei’s latest AI accelerators and flagship mobile processors have been manufactured this way. Huawei’s target is 1.6 million high-end logic dies in 2026.

The critical point for supply chain analysis is not the yield inefficiency — it is the trajectory. SMIC entered 5nm pilot production in 2025 with approximately 20% yield. Low-yield production of near-frontier chips today becomes medium-yield production within 18 months if tooling and process optimisation continue on the current arc. The MATCH Act’s proponents argue that closing the DUV access channel now — before SMIC improves yields further — is the decision point that determines whether China achieves competitive domestic AI chip production this decade.

ASML’s Exposure: Revenue and the Installed Base

The 33% China revenue figure is the most cited number, but it understates the full exposure. ASML guided investors in January 2026 to expect China’s share to normalise toward 20% in 2026 as the pre-buying cycle for DUV tools winds down — Chinese fabs had accelerated purchases between 2022 and 2024 in anticipation of tighter controls, inflating the 2024 China share to 41% of total revenue. On that basis, the forward-sales exposure may be more manageable than the headline 33% suggests.

The harder problem is the installed base. Approximately 1,400 ASML DUV and metrology machines are currently operating inside Chinese fabs. Those machines require ongoing calibration, software updates, and field support to maintain process stability. Precision lithography tools degrade in yield performance within months without official maintenance. Chinese fabs have already begun exploring workarounds — secondary-channel parts suppliers and independent engineers — but these are not substitutes for factory-trained ASML service engineers running calibration software that ASML controls.

Key claim BofA estimates a full ban on DUV immersion tools and related servicing to China would reduce ASML revenues by approximately 14–15% and cut EBIT by 16–17%. NWI analysis: the servicing restriction — which threatens the high-margin Installed Base Management business tied to ~1,400 machines already in China — is the more structurally damaging of the two provisions.

ASML’s Q1 2026 results beat consensus — net sales of €8.8 billion, gross margin of 53.0%, full-year guidance raised to €36–40 billion — but the stock fell 6% on the day earnings were released, as investors priced in the MATCH Act overhang.

The Netherlands: Aligned in Principle, Not in Practice

The Dutch government has tightened its own semiconductor export controls. Rules effective 1 April 2025 require ASML to apply for Dutch export licences before shipments, partially aligning the Dutch licensing regime with US positions. Dutch Prime Minister Jetten raised the ASML controls during a White House visit in April 2026; talks were described as constructive but produced no consensus. The structural problem for Dutch diplomacy is that the MATCH Act’s servicing ban exceeds anything the Dutch government has implemented domestically, and matching it would require Dutch parliamentary action — a legislative process that cannot complete within 150 days.

The CSIS analysis of transatlantic export control alignment notes the relationship has improved substantially since 2022 but that “structural gaps remain” in legacy equipment, servicing, and enforcement reach. The MATCH Act’s 150-day window is explicitly designed to force resolution of those gaps rather than through indefinite bilateral negotiation.

What This Means for Enterprise Procurement

For organisations whose supply chains touch SMIC-manufactured components — automotive microcontrollers, consumer electronics, certain memory products, and mature-node logic — the MATCH Act creates a planning horizon, not an immediate disruption. The bill has cleared committee with bipartisan momentum but still faces full House and Senate floor votes. A realistic timeline for full implementation runs into late 2026 or early 2027.

The procurement implications run in two directions. For buyers of SMIC-made chips: the MATCH Act is a medium-term constraint on SMIC’s ability to maintain and expand near-frontier node capacity. It does not immediately affect SMIC’s production of mature nodes (28nm and above), which do not depend on DUV immersion equipment at the same intensity. Procurement teams sourcing advanced-node components from SMIC should model a capacity-plateau scenario beginning in 2027.

For buyers downstream from the memory ecosystem: Samsung’s NAND fab in Xi’an and SK Hynix’s DRAM fab in Wuxi are not named in the current bill but could be affected by any expanded FDPR action. Those fabs collectively account for a meaningful share of global DRAM and NAND supply. The administration’s posture on allied-nation memory fabs inside China is an open question the bill’s current text does not resolve — a risk that belongs in any procurement scenario model covering 2027 memory pricing.

What to Watch

The 150-day diplomatic window is the most immediately actionable signal. If the Netherlands demonstrates alignment — for example, by extending its domestic export control regime to cover servicing at named Chinese fabs — it may forestall the FDPR expansion that would bring all ASML DUV tools under US jurisdiction. Watch for Dutch Ministry of Foreign Affairs export licence scope changes and bilateral US-Netherlands trade meeting outcomes between now and enactment.

SMIC’s domestic DUV programme is China’s long-run hedge. SMIC is testing a first-generation domestic immersion DUV tool. The timeline to commercial viability determines how long the MATCH Act’s controls remain structurally effective — a credible domestic capability would require multiple additional years of yield improvement and tool qualification, if it is ever achieved. The MATCH Act’s proponents are betting that closing the import channel now creates a gap China cannot bridge in time.

Watch ASML’s Q2 and Q3 2026 earnings calls for Installed Base Management revenue as a proportion of total revenue. Any contraction in that segment ahead of legislation would indicate Chinese fabs are pre-emptively decoupling from ASML service contracts — a leading indicator of the production-capacity degradation the bill intends. This connects to the broader pattern of technology policy creating structural supply chain forks that procurement teams must now route around rather than hedge through single-sourcing.

The MATCH Act is the first attempt to close the DUV loophole through congressional statute. Whether it passes in its current form or a modified one, the 150-day clock it establishes has already accelerated decisions that procurement teams, fab operators, and diplomatic offices had been deferring. The structural teeth — statutory permanence, the servicing ban, the allied-nation deadline — are what distinguish it from every prior semiconductor export control action. Understanding that distinction is the signal that matters.

This article was produced with AI assistance and reviewed by the editorial team.
Arjun Mehta, AI infrastructure and semiconductors correspondent at Next Waves Insight

About Arjun Mehta

Arjun Mehta covers AI compute infrastructure, semiconductor supply chains, and the hardware economics driving the next wave of AI. He has a background in electrical engineering and spent five years in process integration at a leading semiconductor foundry before moving into technology analysis. He tracks arXiv pre-prints, IEEE publications, and foundry filings to surface developments before they reach the mainstream press.

Meet the team →
Share: 𝕏 in
The NextWave SignalSubscribe free

The NextWave Signal

Enjoyed this analysis?

One AI market analysis + one emerging-tech signal, every Tuesday and Friday — written for engineers, PMs, and CTOs tracking what shifts before it goes mainstream.

Leave a Comment